Pin grid array packages have become a popular form of integrated circuit packaging, as they provide for a large number of pins in a plug-in type package. An array of pins having a standard spacing (for example, 100 mils center to center) is located on a ceramic substrate so that the pins extends outward from one face of the substrate to join with sockets on a main printed circuit board. An integrated circuit or semiconductor device is mounted on the top side of the ceramic substrate and wire bonds are made between the bonding pads of the integrated circuit and the traces on the substrate. The integrated circuit, the leads, and the wire bonds are then covered with an encapsulant to complete the package.
Two types of encapsulation methods have been used. In the first, the integrated circuit chip and associated interconnections are encapsulated in a plastic resin, as in glob top or chip-on-board technology. In the second method, the assembly is encapsulated by transfer molding a thermoset plastic composition over the device and the ceramic substrate. In transfer molding, the assembly to be encapsulated is located inside a metal mold which has recesses defining the shape of the cover to be produced. Solid plastic is heated and forced under pressure through gates into the mold. The heat and pressure causes the plastic to liquify and flow into the mold cavities surrounding the integrated circuit. The mold is heated to cure the plastic and the molded assembly is then removed from the mold. The basic characteristics of transfer molding are taught in U.S. Pat. No. 4,460,537.
The structure of a plastic pin grid array assembly is similar to its ceramic equivalent. Instead of using a ceramic substrate, low-cost materials such as epoxy-glass or polyester-glass printed circuit boards are used for the substrate. The fabrication of these substrates shares most of the same assembly processes and techniques with conventional printed circuit board manufacturing processes. The pins of the package are inserted into plated-through holes in the circuit board and either press-fit or reflow soldered.
Referring to FIG. 1a and FIG. 1b in the prior art, plastic molded pin grid arrays 10 are formed about a substrate 12 containing an array of pins 14 extending from the bottom of the substrate 12. A plastic compound 16 is transfer-molded about the substrate to form a completed package. The substrate is registered in the mold by locating the edges of the substrate 12 against registration bumps in the mold. After the molding is completed, the registration bumps appear in the finished pin grid array package as indentations or ribs 13. Alternate methods and configurations of forming molded pin grid array packages employ slanted side walls 18 to aid in removal of the molded part from the molding press. Such a transfer-molded plastic pin grid array package is taught in U.S. Pat. No. 4,935,581.
The advantages of a plastic pin grid array as compared to a ceramic pin grid array are low cost and better electrical performance. However, despite these advantages, low-density and fragile pins remain major concerns in pin grid array packages. Because of the requirement to attach leaded pins to the substrate, there is an inherent density limitation in pin grid array packages. Conventional packages utilize pins placed at 100 mil centers and newer packages promise density increases with 50 mil center pins, but at a significant expense. In order to achieve 50 mil centers, expensive multilayer substrate construction must be used. In addition, the cost of fabricating and attaching the pins is high. Large pin grid array packages are difficult to assemble into the main circuit board because of bent and skewed package leads. As the size of the package increases, these problems become greatly magnified. The high density 50 mil center packages are particularly prone to bent leads due to the small diameter of the leads.
The use of large integrated circuit chips is also restricted when using plastic pin grid array packages. Conventional wisdom dictates that these packages are used only for consumer electronics applications with small integrated circuit chips requiring plug in chip carriers. When larger chips are used, ceramic substrates are employed to accommodate the thermal expansion mismatch between the substrate and the silicon chip. Clearly, a need exists for a low-cost, high density plastic package that would overcome the inherent problems of density, lead fragility, electrical performance, cost, and reliability found in conventional ceramic and printed circuit board pin grid array packages.